Makefile: Fix regression in .SILENT rule
Since !4605 (merged), WriteMakeRule
now correctly escapes $
in make target paths as $$
. However, this
caused an existing call site to escape the $(VERBOSE)
variable
reference in the .SILENT
prefix, making it ineffective. Sub-makefiles
are invoked with MAKESILENT
, so this bug matters only for the all
target, which emits progress messages from toplevel.
Before:
# Suppress display of executed commands.
$$(VERBOSE).SILENT:
After:
# Suppress display of executed commands.
$(VERBOSE).SILENT:
Backport: release
Topic-rename: makefile-fix-verbose
Edited by Brad King