Verilog: Support HDL languages
Description
Just like C/C++, Verilog/VHDL has lots of IDEs and its compilers. For example:
- Icarus Verilog
- Vivado
- Modelsim
- Quartus II
- ...etc
However, each one has its own project file, which is not compatible with each other. If CMake can support Verilog/VHDL, then those IDEs would be possible to use CMake as project files in the future.
I think CMake can start from "Icarus Verilog" because its project file is Makefile. Moreover, I found an issue of "Icarus Verilog", which is talking about using CMake: [Issue 178] Migrate to CMake?
Related Projects and Issues
The followings are some projects and issues I found in GitHub. They are all related to "using Verilog/VHDL with CMake".
- tymonx/logic
- TripRichert/viv-prj-gen
- srjilarious/fpga_start
- steveicarus/iverilog: [Issue 178] Migrate to CMake?
Edited by Haowei Hsu