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Commit 12f000d5 authored by Richard Jones's avatar Richard Jones Committed by Brad King
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abi.h: Add RISC-V, a little-endian architecture.

parent 43f9f8d0
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......@@ -467,6 +467,10 @@ suppression macro KWIML_ABI_NO_VERIFY was defined.
#elif defined(__XTENSA_EL__)
# define KWIML_ABI_ENDIAN_ID KWIML_ABI_ENDIAN_ID_LITTLE
/* RISC-V */
#elif defined(__riscv__)
# define KWIML_ABI_ENDIAN_ID KWIML_ABI_ENDIAN_ID_LITTLE
/* Unknown CPU */
#elif !defined(KWIML_ABI_NO_ERROR_ENDIAN)
# error "Byte order of target CPU unknown."
......
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